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features ? fast read access time ? 90 ns dual voltage range operation ? unregulated battery power su pply range, 2.7v to 3.6v or standard 5v 10% supply range compatible with jedec standard at27c010 low power cmos operation ? 20 a max (less than 1 a typical) standby for v cc = 3.6v ? 29 mw max active at 5 mhz for v cc = 3.6v jedec standard packages ? 32-lead plcc ? 32-lead tsop ? 32-lead vsop high reliability cmos technology ? 2,000v esd protection ? 200 ma latchup immunity rapid programming algorith m ? 100 s/byte (typical) cmos and ttl compatible inputs and outputs ? jedec standard for lvttl and lvbo integrated product identification code industrial temperature range green (pb/halide-free) packaging option 1. description the at27bv010 is a high-performance, low-power, low-voltage 1,048,576-bit one- time programmable read-only memory (otp ep rom) organized as 128k by 8 bits. it requires only one supply in the range of 2.7v to 3.6v in normal read mode operation, making it ideal for fast, portable systems using either regulated or unregulated battery power. atmel?s innovative design tec hniques provide fast speeds that rival 5v parts while keeping the low power consumpt ion of a 3v supply. at v cc = 2.7v, any byte can be accessed in less than 90 ns. with a typical power draw of only 18 mw at 5 mhz and v cc = 3v, the at27bv010 consumes less than one fifth the power of a standard 5v eprom. standby mode supply current is typically less than 1 a at 3v. the at27bv010 simplifies system design and st retches battery lifetime even further by eliminating the need for power supply regulation. the at27bv010 is available in industry-standard jedec-approved one-time programmable (otp) plastic plcc, tsop , and vsop packages. all devices feature two-line control (ce , oe ) to give designers the flexib ility to prevent bus contention. the at27bv010 operating with v cc at 3.0v produces ttl level outputs that are com- patible with standard ttl logic devices operating at v cc = 5.0v. at v cc = 2.7v, the part is compatible with jedec approved low voltage battery operation (lvbo) inter- face specifications. the device is also c apable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts. 1-megabit (128k x 8) unregulated battery-voltage otp eprom at27bv010 0344h?eprom?12/07
2 0344h?eprom?12/07 at27bv010 atmel?s at27bv010 has additional features to ensure high quality and effi cient production use. the rapid programming algorithm reduces the time required to program the part and guaran- tees reliable programming. programming time is typically only 100 s/byte. the integrated product identification code electronically identifi es the device and manufacturer. this feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages. the at27bv010 programs exactly the same way as a standard 5v at27c010 and uses the same programming equipment. 2. pin configurations 2.1 32-lead tsop/vsop (type 1) top view 2.2 32-lead plcc top view pin name function a0 - a16 addresses o0 - o7 outputs ce chip enable oe output enable pgm program strobe nc no connect 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 a11 a9 a8 a13 a14 nc pgm vcc vpp a16 a15 a12 a7 a6 a5 a4 oe a10 ce o7 o6 o5 o4 o3 gnd o2 o1 o0 a0 a1 a2 a3 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 a7 a6 a5 a4 a3 a2 a1 a0 o0 a14 a13 a8 a9 a11 oe a10 ce o7 4 3 2 1 32 31 30 14 15 16 17 18 19 20 o1 o2 gnd o3 o4 o5 o6 a12 a15 a16 vpp vcc pgm nc
3 0344h?eprom?12/07 at27bv010 3. system considerations switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. unless accommodated by th e system design, these transients may exceed datasheet limits, resulting in device non-conformance. at a minimum, a 0.1 f high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. this capacitor should be connected between the v cc and ground terminals of the device, as close to the device as possible. addi tionally, to stabilize the supply vo ltage level on prin ted circuit boards with large eprom arrays, a 4.7 f bulk electr olytic capacitor shoul d be utilized, again con- nected between the v cc and ground terminals. this capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 4. block diagram note: 1. minimum voltage is -0.6v dc which may undershoot to -2.0v fo r pulses of less than 20 ns. maximum output pin voltage is v cc + 0.75v dc which may be exceeded if certain precautions are observed (consult application notes) and which may overshoot to +7.0v for pulses of less than 20 ns. 5. absolute maximum ratings* temperature under bias.................................. -40c to +85c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability storage temperature ..................................... -65c to +125c voltage on any pin with respect to ground .........................................-2.0v to +7.0v (1) voltage on a9 with respect to ground ......................................-2.0v to +14.0v (1) v pp supply voltage with respect to ground .......................................-2.0v to +14.0v (1)
4 0344h?eprom?12/07 at27bv010 notes: 1. x can be v il or v ih . 2. read, output disable, and standby modes require, 2.7v v cc 3.6v, or 4.5v v cc 5.5v. 3. refer to programming characterist ics. programming modes require v cc = 6.5v. 4. v h = 12.0 0.5v. 5. two identifier bytes may be selected. all ai inputs are held low (v il ), except a9 which is set to v h and a0 which is toggled low (v il ) to select the manufacturer?s identification byte and high (v ih ) to select the device code byte. 6. operating modes mode/pin ce oe pgm ai v pp v cc outputs read (2) v il v il x (1) ai x v cc d out output disable (2) xv ih xxxv cc high z standby (2) v ih xxxxv cc high z rapid program (3) v il v ih v il ai v pp v cc d in pgm verify (3) v il v il v ih ai v pp v cc d out pgm inhibit (3) v ih xx x v pp v cc high z product identification (3)(5) v il v il x a9 = v h (4) a0 = v ih or v il a1 - a16 = v il xv cc identification code 7. dc and ac operating cond itions for read operation at27bv010-90 industrial operating temperature (case) -40c - 85c v cc power supply 2.7v to 3.6v 5v 10%
5 0344h?eprom?12/07 at27bv010 notes: 1. v cc must be applied simultaneously with or before v pp , and removed simultaneously with or after v pp . 2. v pp may be connected directly to v cc , except during programming. the supp ly current would then be the sum of i cc and i pp . 8. dc and operating characteristics for read operation symbol parameter condition min max units v cc = 2.7v to 3.6v i li input load current v in = 0v to v cc 1a i lo output leakage current v out = 0v to v cc 5a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 a i sb v cc (1) standby current i sb1 (cmos), ce = v cc 0.3v 20 a i sb2 (ttl), ce = 2.0 to v cc + 0.5v 100 a i cc v cc active current f = 5 mhz, i out = 0 ma, ce = v il , v cc = 3.6v 8ma v il input low voltage v cc = 3.0 to 3.6v -0.6 0.8 v v cc = 2.7 to 3.6v -0.6 0.2 x v cc v v ih input high voltage v cc = 3.0 to 3.6v 2.0 v cc + 0.5 v v cc = 2.7 to 3.6v 0.7 x v cc v cc + 0.5 v v ol output low voltage i ol = 2.0 ma 0.4 v i ol = 100 a 0.2 v i ol = 20 a 0.1 v v oh output high voltage i oh = -2.0 ma 2.4 v i oh = -100 a v cc - 0.2 v i oh = -20 a v cc - 0.1 v v cc = 4.5v to 5.5v i li input load current v in = 0v to v cc 1a i lo output leakage current v out = 0v to v cc 5a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 a i sb v cc (1) standby current i sb1 (cmos), ce = v cc 0.3v 100 a i sb2 (ttl), ce = 2.0 to v cc + 0.5v 1 ma i cc v cc active current f = 5 mhz, i out = 0 ma, ce = v il 25 ma v il input low voltage -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.5 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = -400 a 2.4 v
6 0344h?eprom?12/07 at27bv010 10. ac waveforms for read operation (1) notes: 1. timing measurement references are 0.8v and 2.0v. input ac drive levels are 0.45v and 2.4v, unless otherwise specified. 2. oe may be delayed up to t ce -t oe after the falling edge of ce without impact on t ce . 3. oe may be delayed up to t acc -t oe after the address is valid without impact on t acc . 4. this parameter is only sampled and is not 100% tested. 5. output float is defined as t he point when data is no longer driven. 9. ac characteristics for read operation v cc = 2.7v to 3.6v and 4.5v to 5.5v symbol parameter condition -90 units min max t acc (3) address to output delay ce = oe = v il 90 ns t ce (2) ce to output delay oe = v il 90 ns t oe (2)(3) oe to output delay ce = v il 50 ns t df (4)(5) oe or ce high to output float, whichever occurred first 40 ns t oh output hold from address, ce or oe , whichever occurred first 0ns
7 0344h?eprom?12/07 at27bv010 11. input test waveform and measurement level 12. output test load note: 1. typical values for nominal supply voltage. th is parameter is only samp led and is not 100% tested. t r , t f < 20 ns (10% to 90%) note: cl = 100 pf including jig capacitance. 13. pin capacitance f = 1 mhz, t = 25c (1) symbol typ max units conditions c in 48pfv in = 0v c out 812pfv out = 0v
8 0344h?eprom?12/07 at27bv010 14. programming waveforms (1) notes: 1. the input timing reference is 0.8v for v il and 2.0v for v ih . 2. t oe and t dfp are characteristics of the device but must be accommodated by the programmer. 3. when programming the at27bv010, a 0.1 f capacitor is required across v pp and ground to suppress spurious voltage transients.
9 0344h?eprom?12/07 at27bv010 notes: 1. v cc must be applied simultaneously or before v pp and removed simultaneously or after v pp . 2. this parameter is only sampled and is not 100% tested. output float is defined as the point where data is no longer driven ? see timing diagram. 3. program pulse width tolerance is 100 sec 5%. note: 1. the at27bv010 has the same product identification code as the at27c010. both are programming compatible. 15. dc programming characteristics t a = 25 5c, v cc = 6.5 0.25v, v pp = 13.0 0.25v symbol parameter test conditions limits units min max i li input load current v in = v il , v ih 10 a v il input low level -0.6 0.8 v v ih input high level 2.0 v cc + 1 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = -400 a 2.4 v i cc2 v cc supply current (program and verify) 40 ma i pp2 v pp supply current ce = pgm = v il 20 ma v id a9 product identification voltage 11.5 12.5 v 16. ac programming characteristics t a = 25 5c, v cc = 6.5 0.25v, v pp = 13.0 0.2v symbol parameter test conditions (1) limits units min max t as address setup time input rise and fall times: (10% to 90%) 20 ns input pulse levels: 0.45v to 2.4v input timing reference level: 0.8v to 2.0v output timing reference level: 0.8v to 2.0v 2s t ces ce setup time 2s t oes oe setup time 2s t ds data setup time 2 s t ah address hold time 0 s t dh data hold time 2 s t dfp oe high to output float delay (2) 0 130 ns t vps v pp setup time 2 s t vcs v cc setup time 2 s t pw pgm program pulse width (3) 95 105 s t oe data valid from oe 150 ns t prt v pp pulse rise time during programming 50 ns 17. atmel?s at27bv010 integrated product identification code (1) codes pins hex data a0 o7 o6 o5 o4 o3 o2 o1 o0 manufacturer 0000111101e device type 10000010105
10 0344h?eprom?12/07 at27bv010 18. rapid programming algorithm a 100 s pgm pulse width is used to program. the address is set to the first location. v cc is raised to 6.5v and v pp is raised to 13.0v. each address is first programmed with one 100 s pgm pulse without verification. then a verifica tion/reprogramming loop is executed for each address. in the event a byte fails to pass verification, up to 10 successive 100 s pulses are applied with a verification after each pulse. if the byte fails to verify after 10 pulses have been applied, the part is considered failed. after the byte verifies properly, the next address is selected until all have been checked. v pp is then lowered to 5.0v and v cc to 5.0v. all bytes are read again and compared with the original data to determine if the device passes or fails.
11 0344h?eprom?12/07 at27bv010 19. ordering information note: 1. the 32-lead vsop package is not recommended for new designs. 19.1 standard package t acc (ns) i cc (ma) v cc = 3.6v ordering code package operation range active standby 90 8 0.02 at27bv010-90ji at27bv010-90ti AT27BV010-90VI 32j 32t 32v (1) industrial (-40c to 85c) note: not recommended for new designs. use green package option. 19.2 green package (pb/halide-free) t acc (ns) i cc (ma) v cc = 3.6v ordering code package operation range active standby 90 8 0.02 at27bv010-90ju at27bv010-90tu 32j 32t industrial (-40c to 85c) package type 32j 32-lead, plastic j-leaded chip carrier (plcc) 32t 32-lead, plastic thin small outline package (tsop) 32v 33-lead, plastic thin small outline package (vsop)
12 0344h?eprom?12/07 at27bv010 20. packaging information 20.1 32j ? plcc drawing no. rev. 2325 orchard parkway san jose, ca 95131 r title 32j , 32-lead, plastic j-leaded chip carrier (plcc) b 32j 10/04/01 1.14(0.045) x 45? pin no. 1 identifier 1.14(0.045) x 45? 0.51(0.020)max 0.318(0.0125) 0.191(0.0075) a2 45? max (3x) a a1 b1 e2 b e e1 e d1 d d2 common dimensions (unit of measure = mm) symbol min nom max note notes: 1. this package conforms to jedec reference ms-016, variation ae. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is .010"(0.254 mm) per side. dimension d1 and e1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. lead coplanarity is 0.004" (0.102 mm) maximum. a 3.175 ? 3.556 a1 1.524 ? 2.413 a2 0.381 ? ? d 12.319 ? 12.573 d1 11.354 ? 11.506 note 2 d2 9.906 ? 10.922 e 14.859 ? 15.113 e1 13.894 ? 14.046 note 2 e2 12.471 ? 13.487 b 0.660 ? 0.813 b1 0.330 ? 0.533 e 1.270 typ
13 0344h?eprom?12/07 at27bv010 20.2 32t ? tsop 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 32t , 32-lead (8 x 20 mm package) plastic thin small outline package, type i (tsop) b 32t 10/18/01 pin 1 d1 d pin 1 identifier b e e a a1 a2 0o ~ 8o c l gage plane seating plane l1 common dimensions (unit of measure = mm) symbol min nom max note notes: 1. this package conforms to jedec reference mo-142, variation bd. 2. dimensions d1 and e do not include mold protrusion. allowable protrusion on e is 0.15 mm per side and on d1 is 0.25 mm per side. 3. lead coplanarity is 0.10 mm maximum. a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 19.80 20.00 20.20 d1 18.30 18.40 18.50 note 2 e 7.90 8.00 8.10 note 2 l 0.50 0.60 0.70 l1 0.25 basic b 0.17 0.22 0.27 c 0.10 ? 0.21 e 0.50 basic
14 0344h?eprom?12/07 at27bv010 20.3 32v ? vsop 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 32v , 32-lead (8 x 14 mm package) plastic thin small outline package, type i (vsop) b 32v 10/18/01 pin 1 d1 d pin 1 identifier b e e a a1 a2 0o ~ 8o c l gage plane seating plane l1 common dimensions (unit of measure = mm) symbol min nom max note notes: 1. this package conforms to jedec reference mo-142, variation ba. 2. dimensions d1 and e do not include mold protrusion. allowable protrusion on e is 0.15 mm per side and on d1 is 0.25 mm per side. 3. lead coplanarity is 0.10 mm maximum. a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 13.80 14.00 14.20 d1 12.30 12.40 12.50 note 2 e 7.90 8.00 8.10 note 2 l 0.50 0.60 0.70 l1 0.25 basic b 0.17 0.22 0.27 c 0.10 ? 0.21 e 0.50 basic
0344h?eprom?12/07 headquarters international atmel corporation 2325 orchard parkway san jose, ca 95131 usa tel: 1(408) 441-0311 fax: 1(408) 487-2600 atmel asia room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon hong kong tel: (852) 2721-9778 fax: (852) 2722-1369 atmel europe le krebs 8, rue jean-pierre timbaud bp 309 78054 saint-quentin-en- yvelines cedex france tel: (33) 1-30-60-70-00 fax: (33) 1-30-60-71-11 atmel japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (81) 3-3523-3551 fax: (81) 3-3523-7581 product contact web site www.atmel.com technical support eprom@atmel.com sales contact www.atmel.com/contacts literature requests www.atmel.com/literature disclaimer: the information in this document is provided in connection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in atmel?s terms and condi- tions of sale located on atmel?s web site, atmel assumes no li ability whatsoever and disclaims any express, implied or statutor y warranty relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particu lar purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, punitive, special or i nciden- tal damages (including, without limitation, damages for loss of profits, business interruption, or loss of information) arising out of the use or inability to use this document, even if atme l has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or co mpleteness of the contents of this document and reserves the ri ght to make changes to specifications and product descriptions at any time without notice. atmel does not make any commitment to update the information contained her ein. unless specifically provided otherwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel?s products are not int ended, authorized, or warranted for use as components in applications intended to support or sustain life. ? 2007 atmel corporation. all rights reserved. atmel ? , logo and combinations thereof, and others ar e registered trademarks or trademarks of atmel corporation or its subsidiaries. other terms and product names may be trademarks of others.

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